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Slides and Handouts
NOTE: Permission to use these slides for educational purposes is granted, provided that all copyright notices are preserved.
Memory papers: IBM_SRAM_ISSCC07.pdf, Intel_SRAM_ISSCC07.pdf.
| Topic | Slides (ppt) | |
| 1 | Introduction | 01-Intro.ppt |
| 2 | Fabrication, basic MOS | Scott Hauck's fabrication slides, Harris/Bushnell basic circuits slides |
| 3 | Adders | 03-Adders.ppt Recap: Scott Hauck's Dynamic Logic |
| 4 | Sh Ch tr, RC, delay, power, scaling | 04_rabaey_ch3devices.ppt , 05_gateDelayPowerScaling.ppt , Chris Kim's short channel effects slides : Lect_05_MOS2.pdf |
| 5 | Logical Effort |
Inverter chain sizing (slides 23-40 of Rabaey's chapter5.ppt), |
| 6 | Multipliers | 06-Mult.ppt |
| 7 | Control Path | 07-Ctrl-Path.ppt |
| 8 | Memory | 08-Mem.ppt |
| 9 | Testing | 09-Testing.ppt |
| 10 | Floating Point | 10-FP.ppt |
| 11 | Timing | 11-Timing.ppt |
| 12 | CORDIC |
12-Cordic.ppt |
| 13 | Power | 13-power.pdf |